Job Description
Job DescriptionConduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso; Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso; Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber; Perform whole chip IR drop check by using Ansys Totem; Conduct script modification using Perl programming language; Collaborate with Digital Engineer to define and design the analog to digital interface; Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors; Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Requirements: Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields with graduate level coursework in Analog IC design, VLSI circuits, and RF circuits; plus six months of experience in layout design. Required experience shall include:
- Layout design and implementation for digital and analog circuit schematics;
- Physical verification with DRC, ERC, and LVS to ensure the layout meets the design requirements;
- Optimizing layout design to reduce power consumption, enhance signal integrity, and ensure layout efficiency and manufacturability.
Annual base salary for this role in California, US is expected to be between $151,091- $155,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.